PLC MicroScan Engine

Minimal ladder and structured-text interpreter modeling scan cycles, timers, permissives, and interlocks without physical hardware.

Minimal ladder and structured-text interpreter modeling scan cycles, timers, permissives, and interlocks without physical hardware.

This is not a full PLC stack. It makes the scan-cycle semantics visible enough to reason about them.

Related work

The comms front end and SCADA side projects show the systems around this scan-cycle model.

The transport layer for pacing, validation, and device communication around the logic modeled here.

What a small simulator like this exposes about system behavior.

What the logic connects to.